Design and Test Technology for Dependable Systems-on-Chip

Design and Test Technology for Dependable Systems-on-Chip

Place: 
Hershey
Publisher: 
IGI Global
Phys descriptions: 
xxvi, 550 p.: ill.
Date published: 
2010
Record type: 
Book/Monograph
E-Book
Editor: 
Ubar, Raimund|Raik, Jaan|Vierhaus, Heinrich Theodor
Subject: 
SYSTEMS ON A CHIP -- DESIGN AND CONSTRUCTION.
NETWORKS ON A CHIP -- DESIGN AND CONSTRUCTION.
SYSTEMS ON A CHIP -- TESTING.
Call No: 
004.724.2:62-493 DES
Abstract: 

This book covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC)

Language: 
English
Series: 
Advances in Computer an Electical Engineering(ACEE) book series
Catagory URL: 
http://www.igi-global.com/gateway

CITATION: . Design and Test Technology for Dependable Systems-on-Chip edited by Ubar, Raimund|Raik, Jaan|Vierhaus, Heinrich Theodor . Hershey : IGI Global , 2010. - Available at: https://library.au.int/design-and-test-technology-dependable-systems-chip-4