Reduction of the Transferred Test Data Amount

The chapter deals with compression and-or compaction of the ATPG test vectors and their decompression with the help of on-chip automata. The authors describe ad-hoc test compression methods and compression techniques using subsidiary data from an ATPG. Another possibility of test data amount reduction is to use mixed-mode BIST methods that generate patterns in an autonomous built-in TPG together with deterministic patterns from a tester for a CUT exercising. The authors describe different automata that can generate deterministic test patterns after seeding by a deterministic seed. It is shown that these methods can be similarly efficient as test pattern decompressing automata. The described methods are compared according to their efficiency and the most common test compression techniques used by industrial compression tools are shown.