Synthesis of Flexible Fault-Tolerant Schedules for Embedded Systems with Soft and Hard Timing Constraints

Synthesis of Flexible Fault-Tolerant Schedules for Embedded Systems with Soft and Hard Timing Constraints

Author: 
Izosimov, Viacheslav
Place: 
Hershey, PA
Publisher: 
IGI Global
Date published: 
2010
Record type: 
Responsibility: 
Pop, Paul, jt. author
Eles, Petru, jt. author
Editor: 
Ubar, Raimund
Journal Title: 
Design and Test Technology for Dependable Systems-on-Chip
Source: 
Design and Test Technology for Dependable Systems-on-Chip
Abstract: 

The authors also present evaluation of the schedule synthesis heuristics with and without preemption using extensive experiments and a real-life example.

Series: 
Advances in Computer and Electrical Engineering

CITATION: Izosimov, Viacheslav. Synthesis of Flexible Fault-Tolerant Schedules for Embedded Systems with Soft and Hard Timing Constraints edited by Ubar, Raimund . Hershey, PA : IGI Global , 2010. Design and Test Technology for Dependable Systems-on-Chip - Available at: https://library.au.int/synthesis-flexible-fault-tolerant-schedules-embedded-systems-soft-and-hard-timing-constraints