BOOK/MONOGRAPH
Delay Faults Testing
Date published: 2010
Publisher: IGI Global
Source : Design and Test Technology for Dependable Systems-on-Chip
SoC Self Test Based on a Test-Processor
Date published: 2010
Publisher: IGI Global
Source : Design and Test Technology for Dependable Systems-on-Chip
Software-Based Self-Test of Embedded Microprocessors
Date published: 2010
Publisher: IGI Global
Source : Design and Test Technology for Dependable Systems-on-Chip
High-Speed Logic Level Fault Simulation
Date published: 2010
Publisher: IGI Global
Source : Design and Test Technology for Dependable Systems-on-Chip
High-Level Decision Diagram Simulation for Diagnosis and Soft-Error Analysis
Date published: 2010
Publisher: IGI Global
Source : Design and Test Technology for Dependable Systems-on-Chip
Fault Simulation and Fault Injection Technology Based on SystemC
Date published: 2010
Publisher: IGI Global
Source : Design and Test Technology for Dependable Systems-on-Chip
Self-Repair by Program Reconfiguration in VLIW Processor Architectures
Date published: 2010
Publisher: IGI Global
Source : Design and Test Technology for Dependable Systems-on-Chip
Built-in Self Repair for Logic Structures
Date published: 2010
Publisher: IGI Global
Source : Design and Test Technology for Dependable Systems-on-Chip
Self-Repair Technology for Global Interconnects on SoCs
Date published: 2010
Publisher: IGI Global
Source : Design and Test Technology for Dependable Systems-on-Chip
Fault-Tolerant and Fail-Safe Design Based on Reconfiguration
Date published: 2010
Publisher: IGI Global
Source : Design and Test Technology for Dependable Systems-on-Chip
Memory Testing and Self-Repair
Date published: 2010
Publisher: IGI Global
Source : Design and Test Technology for Dependable Systems-on-Chip
Advanced Technologies for Transient Faults Detection and Compensation
Date published: 2010
Publisher: IGI Global
Source : Design and Test Technology for Dependable Systems-on-Chip
Enhanced Formal Verification Flow for Circuits Integrating Debugging and Coverage Analysis
Date published: 2010
Publisher: IGI Global
Source : Design and Test Technology for Dependable Systems-on-Chip
Diagnostic Modeling of Digital Systems with Multi-Level Decision Diagrams
Date published: 2010
Publisher: IGI Global
Source : Design and Test Technology for Dependable Systems-on-Chip
Optimizing Fault Tolerance for Multi-Processor System-on-Chip
Date published: 2010
Publisher: IGI Global
Source : Design and Test Technology for Dependable Systems-on-Chip